Real-Time Highly Accurate Dense Depth on a Power Budget Using an FPGA-CPU Hybrid SoC

Adaptive CPU-budget allocation for soft-real-time applications

Run-Time Scheduling Support for Hybrid CPU/FPGA SoCs

Minimization of system overhead and jitter is a fundamental challenge in the design and implementation of a Real-Time Operating System (RTOS). Modern FPGA devices, which include (multiple) processor core(s) as diffused IP on the silicon die, provide an excellent platform for embedded systems and offer new opportunities to meet these fundamental RTOS challenges. In particular, it is possible to ...

Debug methods for hybrid CPU/FPGA systems

The combining of one or more CPU’s and an FPGA fabric on the same die is growing in popularity. Such programmable system-on-chip (PSOC) systems promise performance and development time advantages over conventional technology. They include embedded CPU’s which can be characterized as either hard cores (designed into the PSOC at manufacture time) or as soft cores (designed by the end user of the ...

Protecting Real-Time GPU Applications on Integrated CPU-GPU SoC Platforms

Integrated CPU-GPU architecture provides excellent acceleration capabilities for data parallel applications on embedded platforms while meeting the size, weight and power (SWaP) requirements. However, sharing of main memory between CPU applications and GPU kernels can severely affect the execution of GPU kernels and diminish the performance gain provided by GPU. For example, in the NVIDIA Jetso...

Highly accurate gaze estimation using a consumer RGB-depth sensor

Determining the direction in which a person is looking is an important problem in a wide range of HCI applications. In this paper we describe a highly accurate algorithm that performs gaze estimation using an affordable and widely available device such as Kinect. The method we propose starts by performing accurate head pose estimation achieved by fitting a person specific morphable model of the...